Existing Full Adders and Their
نویسنده
چکیده
The main objectives is to compare the existing full adders circuits and there performances and to design a Low Power Full Adder having improved result as compared to existing full adders. The various full adders are described namely BBL-PT (branch based logic and pass transistor logic based), conventional CMOS full adder and hybrid full adder. Finally comparisons between the various full adders have been done to show the better performance of LPFA in terms of power consumption, area (number of transistors) and delay. The LPFA and all other various full adders are designed and simulated using mentor graphics tool in 0.18 μm technology. The frequency used is 100 MHz. the voltage and all the various full adders and others designs are simulated at a voltage supply of 1.8V at same frequency.
منابع مشابه
Study of Existing Full Adders and To Design a LPFA (Low Power Full Adder)
This paper describes the different logic style used for CMOS full adders and different equation used to implement the required Boolean logic for full adders. This paper also describes that the speed of the design is limited by size of the transistors, parasitic capacitance and delay in the critical path. Power consumption and speed are two important but conflicting design aspects; hence a bette...
متن کاملOn the Adders with Minimum Tests
This paper considers two types of n-bit adders, ripple carry adders and cascaded carry look-ahead adders, with minimum tests for stuck-at fault models. In the first part, we present two types of full adders consisting of five gates, and show their minimality. We also prove that one of the full adders can be tested by only three test patterns for single stuck-at faults. We also present two types...
متن کاملHardware-efficient FIR filters with reduced adder step
A technique for reducing the hardware complexity of constant coefficient finite impulse response (FIR) digital filters, without increasing the number of adder steps in the multiplier block adders, is presented. The filter coefficients are adjusted so that the number of full adders in the hardware implementation of any coefficient is independent of the coefficient wordlength and the number of sh...
متن کاملComparative Analysis of 4-Bit Multipliers Using Low Power 8-Transistor Full Adder Cells
In recent year, power dissipation is one of the biggest challenges in VLSI design. Multipliers are the main sources of power dissipation in DSP blocks. In this project various types of full adders design are performed. Different techniques are used for low power in full adders. The design and power comparison of the low power multiplier using different types of full adder adders units are analy...
متن کاملNew full adders using multi-layer perceptron network
How to reconfigure a logic gate for a variety of functions is an interesting topic. In this paper, a different method of designing logic gates are proposed. Initially, due to the training ability of the multilayer perceptron neural network, it was used to create a new type of logic and full adder gates. In this method, the perceptron network was trained and then tested. This network was 100% ac...
متن کامل